Since the traditional differential signal network repeater did not have the ability to codec and was unable to realize the special control of the MVB frames, a design of MVB repeater based on FPGA was put forward. The design processes of the repeater’s decoder and encoder were analyzed in detail, including the repeater time delay analysis and calculation, the judgment and truncation of super-long MVB frames, the time delay setting and implementation of the interframe spacing adjustment, etc. Through the actual test and the comparative analysis of time parameter, the feasibility of the design was verified.