Xuexun ZHOU, Qi LU, Ting FAN, et al. Design and Implementation of Train Network Address Translation (R-NAT) Based on FPGA. [J]. Electric Drive for Locomotives (2):52-59(2021)
DOI:
Xuexun ZHOU, Qi LU, Ting FAN, et al. Design and Implementation of Train Network Address Translation (R-NAT) Based on FPGA. [J]. Electric Drive for Locomotives (2):52-59(2021) DOI: 10.13890/j.issn.1000-128x.2021.02.009.
Design and Implementation of Train Network Address Translation (R-NAT) Based on FPGA
R-NAT is the core technology of real-time Ethernet. In this paper, a method of R-NAT implementation based on FPGA is proposed, and the corresponding program of FPGA is designed. The simulation and actual test results showes that R-NAT implemented by FPGA had correct function and can process Ethernet packets at line speed. The performance of Ethernet packet processing is far exceeding the embedded CPU.